A 200-pA Under-Voltage Lockout Circuit for Ultra-Low Power Applications

Chatterjee, Shouri and Chowdary, Gajendranath (2019) A 200-pA Under-Voltage Lockout Circuit for Ultra-Low Power Applications. In: IEEE International Symposium on Circuits and Systems, ISCAS, 26-29 May 2019, Sapporo, Japan.

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A temperature compensated under voltage lockout (UVLO) circuit for ultra-low power applications is presented. The UVLO operation is achieved using two transistors with different threshold voltages and a source follower. The difference in the thresholds of the two transistors is used to create a reference voltage. As the supply voltage rises, the generated reference voltage tracks the supply till its designed voltage value and thereafter becomes a constant. This reference voltage is applied to a self-referenced common-source stage and is further amplified by CMOS inverters to arrive at a decision to lock out the supply or not. The designed UVLO consumes 200 pA of current at 1.8 V supply. The measured low-to-high trip points (LHTP) and high-to-low trip points (HLTP) are 1.28 V and 1.12 V with a variability of 208 ppm/ ◦C and 200 ppm/ ◦C respectively. These trip points are programmable from 1.1 V to 1.4 V in steps of 100 mV. The design occupies 0.00723 mm2 in standard 180 nm CMOS.

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IITH Creators:
IITH CreatorsORCiD
Chowdary, GajendranathUNSPECIFIED
Item Type: Conference or Workshop Item (Paper)
Subjects: Electrical Engineering
Divisions: Department of Electrical Engineering
Depositing User: Team Library
Date Deposited: 24 Jun 2019 06:29
Last Modified: 24 Jun 2019 06:29
URI: http://raiith.iith.ac.in/id/eprint/5543
Publisher URL: http://doi.org/10.1109/ISCAS.2019.8702478
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