Pulse Width Modulated Multi-Level Inverter Topologies Using Conventional Two Level Inverters for Multi Pole Pair Induction Motor Drives

Nallamekala, K K and K, Siva Kumar (2015) Pulse Width Modulated Multi-Level Inverter Topologies Using Conventional Two Level Inverters for Multi Pole Pair Induction Motor Drives. PhD thesis, Indian institute of technology Hyderabad.

[img] Text
Thesis_Phd_EE_5203.pdf - Submitted Version
Restricted to Repository staff only until October 2020.

Download (6MB) | Request a copy


Multi-level inverters are gaining more attention mainly in AC drive application due to their many attractive features like better harmonic profile, lower switching losses, good electromagnetic compatibility (EMC). Moreover, higher voltage magnitude at the inverter output can be generated by using low voltage dc sources and switching devices with less voltage blocking capability. But main disadvantages of the conventional diode clamed and capacitor clamped multi-level inverters are the capacitor voltage balancing issues and requirement of extra clamping diodes in case of neutral point clamed inverter configuration and the requirement of extra capacitors in case of flying capacitor configuration. The main drawback of Cascaded H-Bridge multi-level inverter configuration is the requirement of more number of dc sources. In order to eliminate the above mentioned drawbacks, three multi-level inverter configurations and one pulse width modulation technique are proposed in this thesis. In this thesis, a multi-level inverter topology for a four pole induction motor drive is presented which is constructed using the induction motor stator winding arrangement. Single dc source with a less magnitude when compared with conventional five-level inverter configurations is used in this topology. Therefore power balancing issues (which are major challenges in conventional multi-level inverters) are minimized. As this configuration is using single dc source, it provides path for zero sequence currents because of the zero sequence voltages present in the inverter output voltage, which will flow through the motor phase winding and power electronic switches. To minimize these zero sequence currents, Sine-Triangle PWM (SPWM) is used which will shift the lower order harmonics near to switching frequency in the linear modulation region. But in case of over modulation, harmonic voltages will be introduced close to fundamental frequency. In this regard a modified SPWM technique is proposed to operate the drive in the over modulation region up to modulation index of 2/√3. An improved multi-level inverter configuration is also presented for four pole induction motor drive by reducing the requirement of bi-directional switches compared to the previous configuration. The entire configuration is supplied by a single dc source only. This configuration can be operated during switch fault condition also which will increase the reliability of the system. SPWM technique is used to generate the gating pulses for the proposed inverter configuration in the linear modulation region and modified SPWM technique in the over modulation region. This thesis also presents an Unipolar Phase Shifted Carrier PWM (UPSC PWM) controlled multi-level inverter topology which is derived by using four two-level inverters only (i.e. requirement of bi-directional switches is completely eliminated). Many Pulse Width Modulation techniques are proposed in the literature and one of the popular modulation methods is UPSC PWM. By using this technique, all lower order harmonics are shifted to higher levels without increasing the switching frequency. This PWM technique is commonly used in the Uninterrupted Power Supply (UPS) applications where transformer multiple primary windings are connected to two-level inverters. The availability of more windings at primary side of the transformer is a well-known concept. But, this modulation technique is not popularly used in drives applications because conventional induction motor consists of only two terminals per phase. A multi-level inverter configuration for four pole induction motor drive is presented which is compatible to use the above mentioned PWM technique. Two isolated dc sources are used to feed four two-level inverters so that zero sequence currents through motor winding and power electronic switches are minimized. By using this multi-level inverter configuration and UPSC PWM technique, all lower order harmonics are shifted to four times the switching frequency which in turn reduces the current ripple and torque ripple considerably. In case of conventional Neutral Point Clamped (NPC) or flying capacitor multi-level inverter configurations, active switches are connected in series to produce multi-level output voltage waveform. Therefore if any one switch fails, entire configuration has to be shut down. A dual three-level inverter configuration for four pole induction motor drive is presented to improve reliability of the system and also improves voltage and current harmonic profile also. This topology is developed by feeding four-pole induction motor stator winding with four conventional two-level inverter modules (i.e. the power circuit is similar to the configuration presented in the previous contribution). The level shifted carrier based Space Vector PWM technique is used to produce the gating signals for the proposed configuration. By providing proper phase shift between carrier waves, multi-level voltage waveform is produced across the total motor phase winding and also first center band harmonics are cancelled. All the proposed topology are simulated in MATLAB/ Simulink and experimentally verified with 5-hp four-pole induction motor drive by using v/f control. Gating signals are produced by using eMEGAsim (Opal-RT Technologies) and dSPACE1104. Finite Element Analysis (FEA) is used to estimate the torque ripple. Simulation and experimental results show the validity of proposed configurations in linear and over modulation regions. All these configurations can be easily extended to produce higher number of voltage for the induction motors with more than four poles. All these experiments are carried with 5-hp induction motor due to the laboratory constraints, but these configurations can be used for medium and high power applications by properly selecting the rating of the switching devices.

[error in script]
IITH Creators:
IITH CreatorsORCiD
Item Type: Thesis (PhD)
Subjects: Electrical Engineering
Divisions: Department of Electrical Engineering
Depositing User: Team Library
Date Deposited: 16 May 2019 11:28
Last Modified: 16 May 2019 11:30
URI: http://raiith.iith.ac.in/id/eprint/5203
Publisher URL:
Related URLs:

Actions (login required)

View Item View Item
Statistics for RAIITH ePrint 5203 Statistics for this ePrint Item