Optimization of LDPC Codes As Defined In IEEE 802.16e Standards

Nandagawali, Shrikant R and Sharma, G V V (2017) Optimization of LDPC Codes As Defined In IEEE 802.16e Standards. Masters thesis, Indian Institute of Technology Hyderabad.

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Low-density parity-check (LDPC) codes are used in communication and storage systems since they achieve error correction performance very close to the Shannon limit f or large block lengths. LDPC block codes admit parallel decoding with low complexity hardware implementation. In this thesis, we investigated the description of the different algorithmic architectur e of low- complexity implementa- tions of the channel encoding and channel decoding modules in a wire- less communication system employing the low-density parity-check (LDPC) codes set forth in th e IEEE 802.16e standards. The performance of the decoding algorithms presented here was first val idated via simulations. The de- tailed design of Layered decoding algorithm and flexible encoder is im plemented in MATLAB with various fixed point quantization schemes. Also memory requirement and time latency are calculated for easy implementation of this architecture into the hardware.T he detailed optimization of the de- coding and encoding architecture is explained in function blocks wit h the pseudocodes. The MATLAB simulation results have been documented.

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IITH Creators:
IITH CreatorsORCiD
Item Type: Thesis (Masters)
Uncontrolled Keywords: LDPC, IEEE 802.16e, Layered decoding, optimization, TD844
Subjects: Electrical Engineering
Divisions: Department of Electrical Engineering
Depositing User: Team Library
Date Deposited: 30 Jun 2017 11:48
Last Modified: 04 Jun 2019 11:39
URI: http://raiith.iith.ac.in/id/eprint/3320
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