Concurrency Control using Multi-version Software Transactional Memory System

Kumar, Priyanka (2015) Concurrency Control using Multi-version Software Transactional Memory System. PhD thesis, Indian Institute of Technology Hyderabad.

[img] Text
CS14RESCH11008.pdf - Submitted Version
Restricted to Registered users only until 8 June 2021.

Download (1MB) | Request a copy


In computer science, software transactional memory (STM) is a concurrency control mechanism analogous to database transactions for controlling access to shared memory. It is an alternative to lock-based synchronization. A transaction in this context is a piece of code consisting a series of reads and writes to shared memory. STM system ensures read and write logically occur at a single instant of time.

[error in script]
IITH Creators:
IITH CreatorsORCiD
Item Type: Thesis (PhD)
Uncontrolled Keywords: Multi-core Systems, Concurrency, Correctness, Software Transactional Memory, TD538
Subjects: Computer science > Big Data Analytics
Divisions: Department of Computer Science & Engineering
Depositing User: Library Staff
Date Deposited: 09 Jun 2016 06:12
Last Modified: 09 Jun 2016 06:12
Publisher URL:
Related URLs:

Actions (login required)

View Item View Item
Statistics for RAIITH ePrint 2438 Statistics for this ePrint Item