Reddy, P S
(2014)
Investigating Lowcomplexity Architectural Issues under UBSS.
Masters thesis, Indian Institute of Technology, Hyderabad.
Abstract
Our Project aim is to develop a real time chip to process the sensor signals and
separating the source signals, which is used in Health care like Autism. Autism is a
disease which aects the child mental behavior. So If we analyze the signals form the
brain so we can observe the how eectively the disease is cured. So to analyze the
Autism we need EEG signals from almost 128 Leads from the scalp of child, which is
dicult to do so. Thus we have to reduce the number of Leads used and at the same
time we should get the all information as in the case of 128Leads. Thus solving our
problem is to solve Underdetermined Blind Source Separation (UBSS).
And in some other cases we may have only one mixture signal (M=1), which is
extreme case of UBSS, from which we have to extract the unknown sources, which is
called Single channel Independent Component Analysis also called SCICA. In SCICA
if we have N source signals then it is called NDSCICA.
In real time UBSS or SCICA problem we require a Digital chip which will separate
the sources in real time case. So we require a chip which is High speed so that it will
be suitable for real time applications and also it should be Recongurable so that it
can work for dierent type of applications where the frame length of signals vary.
So rst we investigated the architectural issues of Recongurable Discrete Hilbert
Transform for UBSS where M is greater than one. Thus we proposed a highspeed and
recongurable Discrete Hilbert Transform architecture design methodology targeting
the realtime applications including CyberPhysical systems, Internet of Things or
Remote HealthMonitoring where the same chipset needs to be used for various pur
poses under realtime scenario. By using this architecture we are able to get Discrete
Hilbert Transform for any given Mpoint by reusing Npoint Discrete Hilbert Trans
form as a kernel. Here N and M are multiple of 4 and N respectively. Subsequently we
provide the architecture design details and compare the proposed architecture with
the conventional stateoftheart architecture. Thorough theoretical analysis and ex
vi
perimental comparison results show that the proposed design is twice as fast and
recongurability is also achieved simultaneously.
After DHT, we proposed a new algorithm for NDFastICA which is used for ex
treme case of UBSS where the number of mixture/sensor signals are only one. In this
algorithm we used CORDIC based NDFastICA which is recongurable so that the
same chip can be used for dierent dimensioned FastICA.
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