Ambient Temperature-Induced Device Self-Heating Effects on Multi-Fin Si CMOS Logic Circuit Performance in N-14 to N-7 Scaled Technologies

Venkateswarlu, Sankatali and Nayak, Kaushik (2020) Ambient Temperature-Induced Device Self-Heating Effects on Multi-Fin Si CMOS Logic Circuit Performance in N-14 to N-7 Scaled Technologies. IEEE Transactions on Electron Devices, 67 (4). pp. 1530-1536. ISSN 0018-9383

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Abstract

We have studied the impact of thermal contact resistance (TCR) ( Rth ) and within-chip ambient temperature ( TA ) on the device self-heating effect (SHE) and its effect on transient and steady-state performance of Si 3-Fin FinFET-based CMOS inverter (from N-14 to N-7 technologies) using coupled hydrodynamic-thermodynamic (HD-TH) mixed-mode simulations. The effect of the load capacitance ( CL ) on device lattice temperature ( TL ) and its impact on propagation delay ( tpd ) of the targeted CMOS inverter circuit are analyzed. The impact of technology scaling on SHE of inverter and its effect on circuit performance is also studied. We investigated the SHE in the 3-Fin FinFET-based ring oscillator (RO) and estimated the stage delay and frequency of oscillations. Our simulation results revealed that within-chip TA and Rth of gate, source, and drain ( Rth,GSD ) have significant effect on the logic circuit performance in terms of degradation of noise margin (NM), inverter gain ( gmax), and increase in tpd due to SHE from N-14 to N-7 technologies. © 1963-2012 IEEE.

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IITH Creators:
IITH CreatorsORCiD
Nayak, Kaushikhttps://orcid.org/0000-0001-6583-264X
Item Type: Article
Additional Information: Manuscript received November 13, 2019; revised January 23, 2020; accepted February 18, 2020. Date of publication March 5, 2020; date of current version March 24, 2020. This work was supported by Visves-varaya PhD Scheme under MeitY, Government of India. The review of this article was arranged by Editor R. Venkatasubramanian. (Corresponding author: Sankatali Venkateswarlu.) The authors are with the Department of Electrical Engineering, IIT Hyderabad, Hyderabad 502285, India (e-mail: ee15resch11007@ iith.ac.in; knayak@iith.ac.in).
Uncontrolled Keywords: 3-Fin CMOS; ambient temperature (TA); electro-thermal (ET); noise margin (NM); propagation delay; self-heating effect (SHE); thermal contact resistance (TCR) (Rth,GSD)
Subjects: Electrical Engineering
Divisions: Department of Electrical Engineering
Depositing User: . LibTrainee 2021
Date Deposited: 25 Oct 2022 13:03
Last Modified: 25 Oct 2022 13:03
URI: http://raiith.iith.ac.in/id/eprint/11047
Publisher URL: http://doi.org/10.1109/TED.2020.2975416
OA policy: https://v2.sherpa.ac.uk/id/publication/3444
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