A survey of FPGA-based accelerators for convolutional neural networks

Mittal, Sparsh (2020) A survey of FPGA-based accelerators for convolutional neural networks. Neural Computing and Applications, 32 (4). ISSN 0941-0643

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Abstract

Deep convolutional neural networks (CNNs) have recently shown very high accuracy in a wide range of cognitive tasks, and due to this, they have received significant interest from the researchers. Given the high computational demands of CNNs, custom hardware accelerators are vital for boosting their performance. The high energy efficiency, computing capabilities and reconfigurability of FPGA make it a promising platform for hardware acceleration of CNNs. In this paper, we present a survey of techniques for implementing and optimizing CNN algorithms on FPGA. We organize the works in several categories to bring out their similarities and differences. This paper is expected to be useful for researchers in the area of artificial intelligence, hardware architecture and system design.

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IITH Creators:
IITH CreatorsORCiD
Mittal, Sparshhttp://orcid.org/0000-0002-2908-993X
Item Type: Article
Additional Information: Support for this work was provided by Science and Engineering Research Board (SERB), India, Award Number ECR/2017/000622.
Uncontrolled Keywords: Binarized NN; Convolutional NN (CNN); Deep learning; FPGA; Hardware architecture for machine learning; Low power; Neural network (NN); Parallelization; Reconfigurable computing
Subjects: Computer science
Divisions: Department of Computer Science & Engineering
Depositing User: Library Staff
Date Deposited: 23 Sep 2019 11:28
Last Modified: 25 Oct 2022 11:21
URI: http://raiith.iith.ac.in/id/eprint/6359
Publisher URL: http://doi.org/10.1007/s00521-018-3761-1
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