A Survey of Soft-Error Mitigation Techniques for Non-Volatile Memories

Mittal, Sparsh (2017) A Survey of Soft-Error Mitigation Techniques for Non-Volatile Memories. Computers, 6 (1). p. 8. ISSN 2073-431X

Full text not available from this repository. (Request a copy)


Non-volatile memories (NVMs) offer superior density and energy characteristics compared to the conventional memories; however, NVMs suffer from severe reliability issues that can easily eclipse their energy efficiency advantages. In this paper, we survey architectural techniques for improving the soft-error reliability of NVMs, specifically PCM (phase change memory) and STT-RAM (spin transfer torque RAM). We focus on soft-errors, such as resistance drift and write disturbance, in PCM and read disturbance and write failures in STT-RAM. By classifying the research works based on key parameters, we highlight their similarities and distinctions. We hope that this survey will underline the crucial importance of addressing NVM reliability for ensuring their system integration and will be useful for researchers, computer architects and processor designers

[error in script]
IITH Creators:
IITH CreatorsORCiD
Mittal, Sparshhttp://orcid.org/0000-0002-2908-993X
Item Type: Article
Subjects: Computer science
Divisions: Department of Computer Science & Engineering
Depositing User: Team Library
Date Deposited: 24 May 2019 08:32
Last Modified: 24 May 2019 08:32
URI: http://raiith.iith.ac.in/id/eprint/5316
Publisher URL: http://doi.org/10.3390/computers6010008
Related URLs:

Actions (login required)

View Item View Item
Statistics for RAIITH ePrint 5316 Statistics for this ePrint Item