Silicide based integration approach for fabricating highly reliable, hermitically sealed on-chip, low form factor-microfluidics for 3D IC cooling applications

C, Hemanth Kumar and Bonam, S and Vanjari, Siva Rama Krishna and Singh, Shiv Govind (2018) Silicide based integration approach for fabricating highly reliable, hermitically sealed on-chip, low form factor-microfluidics for 3D IC cooling applications. In: IEEE CPMT Symposium Japan (ICSJ), 19-21 November 2018, Japan.

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Abstract

In this paper, we demonstrate a novel approach for fabrication of hermitically sealed, highly reliable on-chip microfluidic channel by utilizing Titanium silicide as a bonding interface between glass and silicon. Microfluidic channel etched on silicon was bonded to Titanium coated glass wafer by forming Titanium Silicide interface. This interface is formed using thermocompression bonding carried at an optimized temperature of 3800C and pressure of 0.2 MPa. Bond strength, scanning acoustic microscopy (SAM cross sectional scanning electron microscopy (XSEM) and dicing analyses carried out on the bonded samples indicate a highly reliable bonding interface. This CMOS compatible vertical integration process can be potentially utilized for heterogeneous integration primarily targeted towards on-chip cooling for three dimensional integrated circuits (3D-IC’s) and low form factor Lab-on-Chip microfluidic platforms.

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IITH Creators:
IITH CreatorsORCiD
Vanjari, Siva Rama KrishnaUNSPECIFIED
Singh, Shiv Govindhttp://orcid.org/0000-0001-7319-879X
Item Type: Conference or Workshop Item (Paper)
Uncontrolled Keywords: Silicide formation , Thermocompression bonding , microfluidic channel , CMOS compatibility , heterogeneous integration
Subjects: Electrical Engineering
Divisions: Department of Electrical Engineering
Depositing User: Team Library
Date Deposited: 14 Jan 2019 04:37
Last Modified: 14 Jan 2019 04:37
URI: http://raiith.iith.ac.in/id/eprint/4700
Publisher URL: http://doi.org/10.1109/ICSJ.2018.8602734
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