A novel integrated circuit design methodology using Dynamic Library concept with reduced non-recurring engineering cost and time-to-market

Sabbavarapu, S and Basireddy, K R and Srinivasulu, N and Acharyya, Amit and Mathew, J (2014) A novel integrated circuit design methodology using Dynamic Library concept with reduced non-recurring engineering cost and time-to-market. Journal of Low Power Electronics, 10 (3). pp. 429-442. ISSN 1546-1998

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Abstract

The Incremental and iterative steps in the conventional digital IC design and automation flow increase the design time and non-recurring engineering cost (NRE), which are the two major driving factors of the IC industry. Reducing both at the same time is a challenge to the research community to come up with a design automation solution. In this paper, we propose a novel and unified methodology by merging the frontend and backend stages of the IC design process which eliminates the frontend CAD tool usage to minimize the Design time and NRE cost. Moreover, the complexity of hierarchical design steps is drastically reduced by mapping the input register-transfer level (RTL) description directly to their corresponding physical designs, derived using the existing CAD tools and stored in pre-computed technology libraries. We introduce the Dynamic Libraries, which store the layouts of the already designed blocks and their references for the later use in further designs. We further validated our methodology with 32-bit ALU which has its vital appearance in all the processors and controllers. The mapping techniques are validated on industrial standard benchmark circuits. These validations witness the considerable improvements in design time over the conventional design methodologies.

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IITH Creators:
IITH CreatorsORCiD
Acharyya, Amithttp://orcid.org/0000-0002-5636-0676
Item Type: Article
Uncontrolled Keywords: And-Invert-Graph (AIG); Boolean Matching; Dynamic Library; Dynamic Symbol Library; Dynamic Tech Library; Electronic Design Automation; Logic Synthesis; Negation-Permutation-Negation Class; Physical Design
Subjects: Physics > Electricity and electronics
Divisions: Department of Electrical Engineering
Depositing User: Team Library
Date Deposited: 30 Dec 2014 07:30
Last Modified: 19 Jun 2018 04:48
URI: http://raiith.iith.ac.in/id/eprint/1279
Publisher URL: https://doi.org/10.1166/jolpe.2014.1334
OA policy: http://www.sherpa.ac.uk/romeo/issn/1546-1998/
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